Instruction decoding in the Intel 8087 floating-point chip
Summary
This article provides a deep dive into how the Intel 8087 coprocessor decodes floating-point instructions, using a mix of an instruction decode PLA, microcode ROM, and hardwired BIU logic. It explains ESCAPE handling, ModR/M usage, and how constants and microcode routines are selected, including the three-part mechanism for loading constants. It also discusses die-level representations and the design trade-offs that kept the chip compact in the 1980s.