Floating Point Fun on Cortex-M Processors
Summary
The article provides an in-depth look at floating point ABIs on Cortex-M processors, detailing soft, softfp, and hard ABIs, and how FPU presence affects calling conventions and performance. It includes practical guidance with Zephyr configurations, assembler examples, and scenarios like NOCP faults, plus notes on dynamically enabling the FPU for on-demand hardware acceleration.