A cache-friendly IPv6 LPM with AVX-512 (linearized B+-tree, real BGP benchmarks)
Summary
This repository analyzes PlanB IPv6 LPM, offering a portable C++17 implementation with AVX-512 SIMD and a scalar fallback, Python bindings, and a detailed benchmark suite. It presents synthetic and real BGP data benchmarks, explores memory footprint, and discusses multi-core scaling and rebuild costs, illuminating where SIMD and data layout provide advantages and where real-world traces shift the results.