CPPL: A Circuit Prompt Programming Language
Summary
CPPL: A Circuit Prompt Programming Language introduces CPPL, a compiler-mediated framework that uses a Python frontend DSL and a JSON-based IR to guide LLM-assisted hardware design. The approach addresses RTL/IR generation challenges by enabling static checks and deterministic lowering to CIRCT for synthesizable Verilog, improving functional correctness over direct Verilog or CIRCT IR generation. The work demonstrates how compiler-assisted interfaces can make AI-assisted hardware design more analyzable and backend-friendly.