The adder at the heart of Intel's 8087 floating-point chip
Summary
Ken Shirriff analyzes the Intel 8087 adder, explaining why a 69-bit input and 70-bit output are used and how rounding bits fit in. He details the four-bit block structure, the Manchester carry chain, and the carry-skip optimization, including NMOS precharge considerations that influenced performance. The post blends hardware reverse engineering with historical context to show how microarchitectural choices shaped the 8087's speed.