Reverse engineering the Qualcomm NPU compiler
Summary
A technical deep-dive into reverse engineering Qualcomm's NPU compiler, revealing how the scheduler and memory placement (VTCM) are handled, including MILP-based optimization with HiGHS, 3D bin-packing, and the Hextimate simulator for cost modeling. The post discusses spill/fill behavior, precision downgrades during placement, and caveats around hidden metadata like spillFillBufferSize for edge deployment.