Examining circuit boards from the Space Shuttle's I/O Processor
Summary
The article analyzes the Space Shuttle's I/O Processor (IOP) pages, focusing on the MIA interface page and the PROM microcode page. It covers how the IOP connected the CPU to 24 data bus networks, the dual-board page construction, the use of Manchester encoding for the data link, and the microcoded MSC/BCE virtual processors running on a single physical processor. It also discusses the physical packaging of the parts, the density differences between PROM and DIP/flat-pack ICs, and historical context around IBM's 4 Pi pages and the AP-101S redesign.