Register deprivation: spills and runtime under forced register scarcity
Summary
The article reports on SpillBench, a study of forced register scarcity on an Intel Xeon E-2236 using gcc 15.2.0 across nine kernels, showing that removing registers generally slows workloads while the eighth kernel SipHash-2-4 remains unaffected. It emphasizes that added spills only weakly predict slowdown (r ≈ 0.55) and that the impact is highly dependent on which register file is reserved (GP vs XMM) and on compiler behavior, with notable limitations such as a single machine and reliance on static spill proxies.