High-Performance Array-Backed LRU Hash Table
Summary
High-Performance Array-Backed LRU Hash Table presents a concurrent, shard-based LRU implementation designed for multi-core, NUMA-aware environments. It uses zero-runtime allocations, 32-bit indices, and a cache-friendly layout to achieve linear scaling and sub-microsecond tail latencies, significantly outperforming standard map+list approaches under contention. The project ships with both user-mode and kernel-mode variants, benchmarks, and detailed build instructions.