Microcode in Intel's 8087 floating-point chip: the scale instruction
Summary
This article by Ken Shirriff dissectes the FSCALE microcode in the Intel 8087, revealing a surprisingly complex sequence of micro-instructions and subroutines. It explains how FSCALE scales a floating-point number by a power of two by updating the exponent, converting the scale argument to an integer, and handling overflow/underflow, NaN, and denormals with hardware support. The post also covers microcode design patterns, such as SPECIAL_TMPS, CREATE_DENORM, and rounding logic using guard/round/sticky bits.